The present invention relates to compensating for degradation of polishing pads employed for chemical-mechanical polishing (CMP) of integrated circuit (IC) substrates. The present invention more particularly relates to compensating for degradation of polishing pads by changing a slurry composition and/or rotational speed of the polishing pad during chemical-mechanical polishing (CMP) of a plurality of substrate lots.
CMP typically involves mounting an IC substrate face down on a holder, and rotating the substrate against a polishing pad mounted on a platen, which in turn is rotating or is in orbital state. A slurry containing a chemical that chemically interacts with the facing substrate layer and an abrasive that physically removes that layer is flowed between the substrate and the polishing pad or on the polishing pad near the substrate. This technique is commonly employed to planarize IC substrate layers, e.g., dielectric and metallization layers.
A typical CMP operation in an IC fabrication facility includes polishing IC substrate surfaces of a plurality of substrate lot. The term "substrate lot," as used in connection with the description of this invention, refers to a collection of about 25 substrates that are typically processed in a group under substantially similar conditions.
Unfortunately, the polishing pad suffers from wear during polishing of the plurality of substrate lots and degrades in performance. Consequently, it is difficult to fabricate IC features, e.g., alignment marks, with reproducible dimensions from substrate lot to substrate lot when the IC substrate surfaces are polished for a fixed period of time on the same polishing pad. The degradation of the polishing pad produces lower film removal rates for some layers and a higher film removal rate for other layers that are being polished on the same IC substrate surface. By way of example, FIG. 1 shows a graph of film removal rate versus the polishing pad life when various layers required to fabricate a metal plug are undergoing polishing. A metal plug formed in a dielectric layer, e.g., layer of silicon dioxide, includes an adhesion layer, e.g., layer of titanium, a barrier layer, e.g., layer of titanium nitride, and a bulk metal layer, e.g., a tungsten layer, that is substantial portion of the metal plug composition. As more and more substrate surfaces are polished on the same polishing pad, the polishing pad ages or degrades. Typically the life of a polishing pad may be long enough to polish between about 100 and about 300 substrates.
As shown in FIG. 1, a film removal rate 12 of a tungsten layer increases with an aging pad and film removal rates 14, 16 and 18 of titanium nitride, silicon dioxide and titanium layers, respectively, decrease with an aging pad. Those skilled in the art will recognize that the film removal rate of silicon dioxide may increase or decrease depending on the polishing conditions, e.g., slurry composition or type or hardness of the polishing pad. Furthermore, it is important to note that the change in film removal rates 12, 14, 16 and 18 are not proportional to each other. As a result, the selectivity of the film removal rates of the various layers mentioned above with respect to each other also change with an aging pad. The term "selectivity," as used in connection with the description of this invention refers to a ratio of a film removal rate of a first layer with respect to a film removal rate of a second layer, which is typically below the first layer. Those skilled in the art will recognize that the film removal rates of various IC substrate layers undergoing polishing on the same polishing pad drastically change from one substrate lot to another and sometimes drastically change within a substrate lot. By way of example, the film removal rates observed during polishing various layers on a substrate surface of a substrate lot may be significantly different from the film removal rates observed when polishing another substrate that belongs to another substrate lot or the film removal rates of the first substrate are significantly different from the film removal rates of the fifteenth substrate within the same substrate lot.
What is therefore needed is a process for compensating for polishing pad degradation due to the aging of the polishing pad to stabilize film removal rates on an IC substrate surface.